VISA 2026

Two shifts are colliding. Below the stack, the accelerator landscape keeps transforming: TPUs, GPUs, NPUs, wafer-scale engines, and dataflow fabrics each spawn their own toolchain, compiler backend, and software ecosystem — duplicated engineering, poor portability, steep learning curves. Above the stack, the programmer is changing too: LLM code agents and autonomous autotuners are starting to write a growing share of accelerator kernels — from AlphaEvolve's evolved kernels to KernelBench-style evaluations of LLM kernel generation, machine-written accelerator code has become a public, measurable reality — and these new programmers need interfaces designed for machine reasoning, not just human intuition.

A virtual ISA — a stable, hardware-agnostic abstraction between programming models and hardware backends — is where these shifts meet. It decouples what a computation expresses from how silicon executes it, enabling compiler reuse across heterogeneous targets, software longevity across hardware generations, and optimization at the right level of the stack. For agents, it is more: the self-describing, verifiable contract that makes machine-written code trustworthy. Momentum is building across MLIR's dialect ecosystem (StableHLO, TOSA), established virtual ISAs such as NVIDIA PTX and SPIR-V, and a new wave of tile-level virtual instruction sets — NVIDIA's CUDA Tile IR and Ascend's Parallel Tile Operation (PTO), both open-sourced within the past year — that raise the abstraction from threads to tiles while keeping the contract versioned and portable. The silicon side is moving just as fast: at this July's DAC in Long Beach, agentic AI dominated the conversation, with autonomous multi-agent flows for RTL design, verification, and debug presented as production capability by major EDA vendors and startups alike. The agents are arriving at both ends of the stack — the contract between them is the missing piece.

What the community lacks is a venue that treats these questions together — virtual ISA design, compilation, DSL integration, hardware co-design, and above all the agent-facing interface. VISA 2026 is that venue. We invite 4–6 page papers on work in progress, positions, visions, and early results — see the call for papers for the full scope.